This book constitutes the refereed proceedings of the 12th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2002, held in Seville, Spain in September 2002.
The 37 revised full papers and 12 poster papers presented were carefully reviewed and selected from numerous submissions. The papers are organized in topical sections on arithmetics, low-level modeling and characterization, asynchronous and adiabatic techniques, CAD tools and algorithms, timing, gate-level modeling and design, and communications modeling and activity reduction.