In recent years, customer demands for higher speeds and smaller chips have resulted in the use of interconnections in multilevel and multilayer configurations. Various issues associated with very large scale integrated circuit (VLSIC) interconnections used for high-speed applications are emphasized. Written for those who want to gain a better understanding of the factors associated with modeling, analyzing and simulating high-density, high-speed interconnections, the chapters are designed so that they can be read independently.

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