Verilog is one of the key languages for chip layout. Not especially difficult, but you still have to somehow learn it. You can easily get manuals on Verilog, but those aren't well suited as a learning pedagogy. The attraction of this book is that it lays out [pun intended] just such a learning path. The chapters explain various aspects of the language. In toto, you get a pretty exposure to most of the language.



Plus, Verilog allows powerful simulations of chips. Necessary to reduce the cost of actually fabricating a functioning design. Another advantage of the book is that you learn how to use Verilog for design for testing, and for doing that testing.

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